Posts Tagged ‘Optimization’

Physical Design Engineer: Silicon Laboratories

July 9th, 2009 by confabee-jobs-usa-1 | No Comments | Filed in Advertising, Media & Public Relations

Job ID:                  12024
Company Name:    Silicon Laboratories
Job Category:            Arts/Entertainment/Publishing; Technology
Location:                 Austin, TX
:            Full-Time, Employee
Experience:              2-5 Years Experience

Job Description:

Job Description: physical design and verification

- Perform floorplanning, power grid design, and timing-closure place and route.
- Perform clock tree synthesis, physical design for area, timing, and power.
- Perform parasitic extraction and physical verification (DRC/LVS)
- Perform timing and power analysis.
- Perform crosstalk, EM and IR drop analysis.
- Develop and document physical design flows and methodology

Qualifications:

- BS/MS in EE/ECE or equivalent
- 3+ years of experience in physical design and verification
- of and CMOS device
- Familiar with high and low power design techniques
- Hands on experience in timing-driven place and route and power grid design
- of crosstalk analysis, avoidance and repair, EM and IR drop analysis.
- Familiar with DSM and DFM issues.
- Strong communication skills and aptitude

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