Engineer, ASIC Design: Marvell Semiconductor, Inc.
May 13th, 2009 by confabee-jobs-usa-1 | No Comments | Filed in Engineering & TechnologyJob ID; 08-4702
Company Name; Marvell Semiconductor, Inc.
Job Category; Engineering
Location; Santa Clara, CA
Position Type; Full-Time, Employee
Experience; 2-5 Years Experience
Marvell offers revolutionary devices that touch every point of the communications infrastructure: switching, transceivers, wireless, PC connectivity, communications controllers, and storage. Our continuous cycle of innovations has enabled Marvell to consistently deliver the industry’s gold standard, emerging as the market leader in virtually all of our product categories.
Position Description:
The Data Storage SOC is an exciting, rewarding and dynamic area, providing many opportunities for professional growth for a motivated candidate. As part of Marvell’s Data Storage division we develop and implement the leading edge SoC solutions. You work closely with your peers, test engineers, field application engineers and product engineers to find the optimal and most cost efficient solution for our customers. Responsibilities Design and integrate IPs for SoC solutions using state-of-the-art IC design methodologies and design flows.
* Perform RTL coding.
* Perform functional verification of design on block and system level.
* Perform synthesis and timing closure.
* Perform SCAN insertion and ATPG generation.
* Provide design documentation, description and information to application engineers, field application engineers, test engineers, production engineers and customers.
Qualifications:
Looking for the candidate who is familiar with digital IC design methodologies, understands all stages of ASIC design flows, and is experienced with state-of-the-art design tools. The candidate is strong in logic design and verification, and has solid knowledge of related VLSI architectures. Minimum requirements:
* Knowledge of HDL and experience in behavioral and RTL coding, Verilog preferred.
* Knowledge of logic synthesis and timing analysis.
* Knowledge of SCAN.
* Knowledge of Data Storage product is a plus.
* BS in Electrical Engineering/Computer Engineering and at least two years of experience.
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Tags: Clara, Customer, Design, electrical engineer, Engineer, Engineering, EXPERIENCE, generation

